A flat panel display device has many advantages such as thin body, power saving, no radiation and has been widely used. The existing flat panel display device mainly includes a liquid crystal display (LCD) and an organic light emitting display (OLED).
A thin Film Transistor (TFT) array substrate is an important part of a flat panel display device. The thin film transistor (TFT) array substrate has features such as the follows. For example, a plurality of pixels are arranged in a region surrounded by a plurality of data lines and a plurality of scan lines crossing each other. Each pixel comprises a liquid crystal capacitor and a thin film transistor for performing a display operation. The thin film transistor is turned on in response to a gate voltage so as to apply a data signal onto the pixel.
During a manufacturing process of the array substrate, some static electricity may inevitably be generated and accumulated on the array substrate because the manufacturing equipment may inevitably come into contact with the array substrate. When the static electricity is accumulated to a certain extent, an electrostatic discharge (ESD) phenomenon may occur at a site such as a tip of a metal pattern where the static electricity is relatively easy to accumulate. When it occurs in a metal line, it may easily cause a short circuit or a disconnection of the transmission line. When it occurs in a display area, it easily lead to breakdown of the thin film transistor and make its original switching function failed, affecting the production yield of the product.
In order to effectively discharge the static electricity accumulated in the array substrate, current technology is used to provide a grounding line in the periphery of the array substrate to discharge the static electricity to the ground. Usually, signal transmission lines, such as data lines and scan lines, are connected to the grounding line through electrostatic discharge elements. Furthermore, in order to avoid damage to the signal transmission line due to a high current generated during the electrostatic discharge, it is usually also necessary to connect a current limiting element, such as a current limiting resistor, in series with the signal transmission line. In current art, the setting of the current limiting resistor is generally formed by patterning a semiconductor layer or a gate metal layer or other metal layer on the array substrate. When the current limiting resistor is formed by patterning the semiconductor layer, its resistance is large enough to provide a good current limiting effect. However, the semiconductor layer usually has poor heat dissipation performance and thus the current limiting resistor easily fails. When the current limiting resistor is formed by patterning the gate metal layer or other metal layer, it has better heat dissipation performance, but cannot provide a good protection against a large current because of its small resistance.
Therefore, there is a need to improve and develop the current art.